Pwm Duty From Voltage⚠ unverified
Electrical / Power Electronics · Compute the PWM duty cycle from an error amplifier (simple model)
Parameters
| Input | Symbol | Unit | Default | Description |
|---|---|---|---|---|
| Vref | Vref | V | 1.0 | Reference voltage |
| Vfb | Vfb | V | 1.0 | Feedback voltage |
| Vramp | Vramp | V | 1.0 | Peak ramp (sawtooth) voltage |
| Output | Symbol | Unit | Description |
|---|---|---|---|
| result | D | — | Duty cycle (dimensionless), clamped to the range 0 to 1 |
The science & history
Understanding the Parameters
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$V_{ref}$ — desired operating point in the same units/scale as $V_{fb}$ (often the internal reference of an error amplifier, e.g. 0.8 V or 1.25 V after a divider).
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$V_{fb}$ — feedback sample of the regulated quantity. When $V_{fb} < V_{ref}$, error is positive and $D$ rises (for a non-inverting error sense as written).
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$V_{ramp}$ — amplitude of the sawtooth/triangle carrier that the error signal is compared against. Larger ramp → lower gain from error voltage to duty ($G = 1/V_{ramp}$).
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$D$ — resulting PWM duty. At zero error, $D = 0$ in this pure proportional map — real controllers add an integrator / compensator so steady-state error can be zero at a nonzero duty.
Derivation (Approaching a Proof)
A trailing-edge PWM comparator turns the switch on at the clock and off when the ramp $v_{ramp}(t)$ crosses the control voltage $v_c$. If the ramp runs linearly from 0 to $V_{ramp}$ over period $T$, the off-crossing occurs at fraction
$$D = \frac{v_c}{V_{ramp}}$$
of the period (for $0 \le v_c \le V_{ramp}$). Identifying the control voltage with a simple error $v_c = V_{ref} - V_{fb}$ (unity-gain error, no compensator dynamics) yields
$$D = \frac{V_{ref} - V_{fb}}{V_{ramp}}.$$
Outside $[0, V_{ramp}]$ the comparator saturates, which is written as $\mathrm{clamp}(\cdot, 0, 1)$. This is not the same as the power-stage relations $D = V_{out}/V_{in}$ (buck) etc.; those are steady-state plant maps. This calculator is the controller map from voltages to duty.
History
Natural PWM (ramp vs control voltage) is the classical implementation in voltage-mode and many current-mode controllers since the earliest IC regulators (e.g. 1970s–80s PWM controllers). Digital control implements the same clamp and scaling in software or DPWM hardware.
Related Concepts: Buck Converter Duty Cycle, Boost Converter Duty Cycle, Buck Boost Duty, Buck Inductor Ripple
Notes: Registry calculator pwm-duty-from-voltage (unverified). Simplified static map — no
compensator poles/zeros, soft-start, or current-mode slope. At $V_{fb} = V_{ref}$, $D = 0$ (needs bias
or integral action in a real loop for nonzero steady duty).